The present invention relates generally to bipolar transistors and more specifically to an improved transistor for use with inductive loads.
A bipolar transistor formed according to the prior art is illustrated in FIG. 1 as including a P substrate 10 having an N buried subcollector 12 formed therein between the substrate 10 and an N- epitaxial collector region 14. The base-region 16 is a P type with extrinsic base portion 17. An N+ emitter 18 is formed in the base region 16. The impurity concentration distribution of the epitaxial collector 14 and the subcollector 12 is shown specifically in FIG. 2 by curve A. The abrupt transition between the collector 14 and the buried collector region 12 minimizes the amount of the collector region 14 of the low impurity concentration between the base region 16 and the buried collector 12. Thus the series resistance of the collector is very low. The abrupt transition results from the processing with a minimum of out-diffusion of the buried collector 12 into the epitaxial layer collector 14. This also reduces the variability in the active portion of the collector 14 between the buried layer 12 and the base region 16.
During turn-off, due to the voltage drop from the lateral Flow of base current, the edge of the base region adjacent 17 turns off faster than the portion of the base region 16 below the emitter region 18. This is illustrated by the variable resistance and the arrows in FIG. 1. Low collector resistance allows a strong focus of current at the center of the emitter during inductor turn-off. Thus there is a hot spot under the center of the emitter region. The abrupt profile of the N-/N+ collector regions 14/12 creates higher fields at higher emitter currents, A secondary breakdown results from inductive loads when the transistor is turned off. The lack of defocusing during the turn-off is very detrimental because of the high fields and currents below the emitter, causes transistor burn-out at hot spots.
One approach of the prior art to reduce the peak current density under the emitter is to spread fields by providing a graded collector region 14. This is produced by a substantial out-diffusion of the subcollector 12 into the epitaxial layer 14 after it is formed. To achieve the same active collector region 14 between curves A and B of FIG. 2, the sub or buried collector region 12' is substantially greater in depth than that of buried collector region 12 of curve A, i.e., more epitaxial deposition is required. Also because of the amount of time that must be diffused as well as its depth, the controlability of the resulting region 14 is substantially less for graph B as it is for graph A. Also, the effective resistivity of the combination of collector portion 14 and 12' is substantially greater than that of 14 and 12, thereby increasing the overall collector resistance, which also limits the performance and packing density elsewhere on an integrated circuit.
Thus, there is a need for providing the turn-off ruggedness of a graded collector region with the low resistance of an abrupt collector region. Thus, it is an object of the present invention to provide a collector region which combines the advantages of a graded collector region and an abrupt collector region.
Another object of the present invention is to provide an improved bipolar transistor having a collector region designed specifically for inductive loads.
Still another object of the present invention is to provide a transistor structure which can be individually tailored in an integrated circuit without extra steps.
These and other objects are achieved by providing a buried region of the same conductivity type as the collector region spaced from the base region and having a substantially uniform lateral impurity concentration except below the center of the emitter region where it has a decreasing impurity concentration range, This defocuses and spreads the field and current concentration in the collector directly below the emitter and yet maintains a low collector resistance, The impurity concentration of the buried collector region below the emitter region decreases laterally towards below the center of the emitter region. The impurity concentration of the buried region below the center of the emitter region is less than the remainder of the buried collector region and may be slightly higher or lower than the collector region or may be the impurity concentration of the collector region. Where the substrate is a different impurity conductivity type than the collector region, the buried collector region extends into the collector region and the substrate. An integrated circuit may include transistors having the buried collector region of the diminishing lateral impurity concentration below the center of its emitter region as well as having transistors with a uniform lateral impurity concentration below the total lateral extent of its emitter region.
A method of achieving the unique collector region includes forming at least a first collector region of a first conductivity type as two lateral portions substantially uniform lateral impurity concentration with a space therebetween in a substrate of a second conductivity type. This is followed by forming a collector layer of a first conductivity type on the substrate, forming a base region of the second conductivity type in the collector region and forming an emitter region of the first conductivity type in the base region over the space in the buried collector region. The lateral portions of the buried collector region are formed having an impurity concentration below the emitter decreasing laterally towards the center of the emitter. The impurity concentration at the center is less than the remainder of the buried collector portion and maybe either slightly higher than the collector layer or be the impurity concentration of the collector layer.
The buried collector region is formed by introducing impurities of a first conductivity type into the substrate in two regions with a first space therebetween. It is followed by heating the substrate to diffuse the impurities vertically and laterally into the substrate to form the two portions of substantially uniform lateral impurity concentration except in the first space which has diminishing lateral impurity concentrations, thus providing a laterally graded collector. Alternatively, impurities of the first buried collector region may be formed by introducing impurities of the first conductivity type and first concentration into the substrate in two regions with a first space therebetween. Impurities of a first conductivity type and a second concentration lower than the first concentration or a faster diffusion rate are introduced into the first space. Subsequently, the substrate is heated to diffuse impurities into the substrate to form the two portions of the same substantially uniform lateral impurity concentration separated by the first space of lower substantially uniform lateral impurity concentration. If the integrated circuit is to include transistors which do not have the unique graded collector, the buried collector region for these transistors is formed by introducing impurities having substantially uniform lateral impurity concentration in the substrate and forming with the base and emitter region thereover such that the buried collector region has substantially uniform impurity concentration under the emitter region.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.